Posts for: #Asic4

A long overdue update - ASIC replication and VHDL

Diagram of ASIC4

It’s been far too long since my last update on this project. It’s the usual excuse (“I’m sorry, but life just got in the way, blah blah blah.”) and to those of you who are taking an interest in my little WiFi Pack project, not to mention the rest of the efforts of the Last Psion project, I can only apologise. For now, here’s a brief update on what I’ve been up to.

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sibodump - Moving from high-level block puller to low-level ASIC controller

UPDATE: The latest version of SIBODUMP has just been released along with binaries for Windows and macOS. Take a look here: https://codeberg.org/thelastpsion/sibo-ssd-dump

SIBODUMP and its partner sketch Dump.ino have slowly developed into a very handy toolkit for SSD ripping. In its current form it’s able to dump blocks from any ASIC5-compatible SSD (so that’s all of them). I’ve also started to get it to pull images in native ASIC4 mode - all but the very earliest SSDs have ASIC4, and being able to talk using ASIC4’s registers could open the doors to even more development.

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SSDs, the ASIC4 and the SIBO Serial Protocol

Psion were a clever bunch, but like many companies in the early 90s they didn’t really do standards. Although the 3c and 3mx had a proper RS-232 serial port (albeit using a very odd connector), all of the earlier models used a proprietary protocol called the SIBO Serial Protocol. All Series 3 models used SSDs that also communicated using this proprietary protocol.

A significant part of developing this equipment involves working out how to emulate an SSD or Psion peripheral. Luckily, while trawling the Internet for Psion PDFs I found the Psion SIBO Hardware Development Kit. This book gives a breakdown of how to create equipment for the Psion Series 3 and 3a, including the controller chips needed, the Psion serial protocol, and how to write drivers for the Series 3 and 3a.

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